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Senior Hardware Engineer (RTL / High-Level Synthesis)

Code Metal

Skills

Required

  • RTL
  • High-Level Synthesis
  • HLS
  • simulation
  • Python / MATLAB
  • hardware modeling
  • bit-accurate types
  • synthesis pragmas
  • modeling trade-offs
  • debugging
  • functional verification flows
  • Catapult
  • Vitis

Preferred

  • CI/CD
  • LLM-assisted code transformation
  • readability tooling
  • Git-based development workflows
  • algorithm
  • CI/CD qualification
  • functional verification
  • C++

Code Metal, a company focused on transpiling between different languages and bridging the gap between algorithm development and deployment to embedded systems. As a Senior Hardware Engineer, you will be responsible for architecting and expanding our capabilities towards creating production-ready RTL from high-level algorithm descriptions. You will work on HLS integration and RTL code generation, contributing to CI/CD qualification and leveraging AI and verification capabilities.

Responsibilities

  • Architect and expand capabilities for creating production-ready RTL from high-level algorithm descriptions.
  • Develop C++ and post-HLS readability and optimization passes to produce human-auditable RTL.
  • Contribute to CI/CD qualification including automated RTL simulation, functional verification, and regression testing.
  • Scripting experience in Python for development, toolchain automation and testing

Requirements

  • Solid hardware modeling background regarding fixed-point arithmetic, bit-accurate types, synthesis pragmas and modeling trade-offs
  • Strong debugging and problem-solving skills
  • Experience with simulation and functional verification flows
  • 3+ years of hands-on experience with writing RTL code or using High-Level Synthesis, including at least one commercial HLS tool (Catapult, Vitis HLS, Stratus, or equivalent)
  • Solid understanding of RTL / VHDL
  • Experience using Linux-based development environments
  • Understanding of FPGA architectural capabilities and constraints
  • Knowledge of verification methodologies and testbench development
  • Experience with DSP algorithms and applications using Python/MATLAB

Preferred

  • Bonus: Interest in or familiarity with LLM-assisted code transformation and readability tooling
  • Experience with Git-based development workflows and CI/CD environments

Benefits

  • Enjoy a flexible hybrid work arrangement, comprehensive health care plan, retirement plan, uncapped vacation, and relocation assistance for qualifying employees.