Principal SoC RTL Engineer

• Principal RTL Engineer to own pre-tapeout quality for digital SoC modules on our MCU platforms and drive architecture, microarchitecture, and RTL development for next-generation silicon.
• LINT, CDC, RDC, silicon bring-up, and validation quality.

About Ambiq Micro, Inc.

Ambiq is on a mission to enable intelligence everywhere — powering the AI edge revolution with the world's lowest-power semiconductor solutions.

Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 300 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications.

Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology.

We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency.

Innovate. Collaborate. Focus. Learn. Achieve.

If that's you, join us — the intelligence everywhere revolution starts here.

seeking passionate technologists who thrive on pushing the boundaries, solving complex challenges, and driving transformative solutions.

Ambiq

• Innovate: We tenaciously find ways to break down the barriers to possible solutions
• Collaborate: We proactively communicate and encourage each other to be better.
• Focus: We keep the voice of the customer at the center of everything we do.
• Learn: We strive for continuous improvement and are always curious.
• Achieve: We execute on quality and follow through on our commitments.

Responsibilities

• In this role, you’ll develop Verilog/SystemVerilog RTL for complex IPs and SoCs, evaluate and integrate 3rd-party IP, partner closely with verification and FPGA teams on test planning and debug, collaborate with physical design to hit timing and power targets, and drive

hands-on principal IC role

• for an engineer who has built and debugged complex SoCs, knows how to raise quality before tapeout, and wants direct impact on production silicon.
• Own and be responsible for pre-tape out quality for digital SOC modules on the MCU
• Explore architecture and develop micro-architecture.
• RTL development for IPs and SOCs using Verilog

3rd party IP identification, selection, and integration

• Collaboration with verification and FPGA teams in test plan development and debug
• Collaborate with the Physical Design team to close the design on timing and power targets
• Assist in silicon bring-up and validation;
• Run tool for quality checks (LINT, CDC, and RDC) and fix/waive the issues

Requirements

• Bachelor’s degree in Electronics Engineering, Electrical Engineering, Instrumentation & Control Engineering, or a related field, plus 20 years of experience.
• Possess deep and broad knowledge of current and emerging SOC design technologies.
• Have expert knowledge in designing, implementing, and troubleshooting IPs and SOC
• Demonstrate a deep understanding of customer needs and the competitive landscape.
• Ability to estimate the impact of and help plan and lead the implementations and have a positive impact on the entire output
• Can architect and guide programs across the full range of technical areas.
• collaborate with a dynamic team that values relentless innovation, customer-centric thinking, and continuous learning. If you're a self-motivated, creative problem-solver eager to push technological limits and make a meaningful impact in energy efficiency, this is your opportunity to grow, excel, and turn groundbreaking ideas into reality.
• Most importantly, the successful candidate will be able to live the

Ambiq