PHY Algo ASIC Engineer

About Cisco

Why Cisco?

• At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond.
• We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds.
• These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
• Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions.
• Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless.
• We work as a team, collaborating with empathy to make really big things happen on a global scale.
• Because our solutions are everywhere, our impact is everywhere.
• We are Cisco, and our power starts with you.

Responsibilities

• As a PHY Algorithm Engineer , you will contribute directly to the modeling, simulation, and performance optimization of advanced physical layer (PHY) and modem algorithms for our flagship Silicon One ASICs.
• Working alongside senior algorithm architects and silicon designers, you will translate theoretical communication concepts into high-fidelity MATLAB simulation models, analyze signal processing tradeoffs, and help validate algorithm performance on real silicon in the lab.
• Model & Develop PHY Algorithms: Design, simulate, and analyze digital signal processing (DSP) and modem algorithms for high-speed SerDes physical layer architectures.
• Develop and maintain comprehensive MATLAB and Simulink models to evaluate bit error rates (BER), equalization tradeoffs (CTLE, FFE, DFE), and noise performance.
• Characterize and tune algorithm configuration parameters to enhance receiver sensitivity, link robustness, and hardware implementation feasibility.
• Collaborate closely with digital ASIC design, firmware, and systems engineering teams to ensure accurate fixed-point translation and RTL implementation of algorithm models.
• Participate in hands-on silicon bring-up, lab measurements, and data collection to correlate simulation predictions with real-world silicon behavior.

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
• 2+ years of hands-on experience in PHY algorithm development or related high-speed communication systems, with a broad system-level orientation and perspective.
• Hands-on MATLAB experience for algorithm development, simulation, and testing.
• Solid theoretical foundation in digital signal processing (e.g., adaptive filtering, equalization, clock and data recovery, modulation).
• Practical understanding of communication systems and receiver/transmitter modem architectures.

Preferred

• Qualifications Experience with high-speed SerDes systems, wireline communications, or high-speed optical/electrical PHY architectures.
• Hands-on experience with lab test equipment (high-bandwidth oscilloscopes, BERTs, spectrum analyzers) for silicon characterization and signal integrity validation.
• Familiarity with fixed-point modeling, C/C++, or Python scripting for simulation flow automation.
• Background in algorithm tuning, parameter optimization, or link-budget analysis.
• Strong analytical mindset, proactive problem-solving skills, and a collaborative team orientation.