Lead Engineer, Development Product Engineering

About Allegro

The Allegro team is united by a clear purpose—advancing technologies that make the world safer, more efficient, and more sustainable.

With over 30 years of experience in semiconductor innovation, we bring that purpose to life across every part of the business—from breakthrough product development and customer success to how we show up for each other and the communities we serve.

Allegro and become part of a team where your contributions truly matter.

We foster a culture of Real Innovation , empowering you to push boundaries, develop cutting-edge solutions, and drive continuous improvement.

Your work will create a Real Impact by solving complex real-world challenges that fuel our success and shape the future of technology.

You’ll experience Real Connection , collaborating with talented colleagues around the globe in an environment built on trust, respect, and a shared purpose.

Join us—and help build what’s next.

Responsibilities

• Designs, develops, and implements automated test solutions for specific devices from product definition through high-volume production release.
• Serves as a technical resource collaborating with Design, Product Validation, Systems Engineering, and Manufacturing teams to define test plans, develop ATE (Automated Test Equipment) programs, and design test hardware.
• Responsibilities focus on ensuring robust test coverage, optimizing test time, and supporting the seamless transition of products to global manufacturing sites What You Will Do ATE & Test Program Development: Independently develops, debugs, and documents ATE test programs (software) for wafer-level (Probe) and package-level (Final Test).
• Performs product setups on Teradyne/Eagle (ETS), SPATS platforms, and industry-standard device handlers.
• Design and verify test interface hardware (load boards, probe cards, socket assemblies) to ensure signal integrity.
• Owns the design and verification of multi-site test interface hardware (load boards, probe cards).
• Gage R&R (GR&R) and Stability Studies.
• Spike Analysis (utilizing tools like RS-Vigilant) to identify transient voltage issues.
• Loop Studies and Test Time Optimization.
• Bench-to-ATE Correlation studies to ensure measurement accuracy.
• Performs expert-level statistical analysis using JMP, Galaxy, or Python.
• Established robust test limits and yield targets by interpreting Histograms, Failure Mode Paretos, and Correlation Studies to ensure test stability before high-volume release.
• Collaborates with IC Design during pre-silicon phases to define and implement Design for Test (DFT) features.
• Focuses on maximizing test coverage and multisite efficiency for next-generation products.
• Manages and delivers all Product Test Capability (PTC) requirements.
• Prepares technical validation summaries and defends findings to Core Team members and Business Unit (BU) management to secure production approval.
• Coordinates the deployment of test solutions to AMPI.
• Serves as the primary technical lead for initial production ramps, providing expert support to ensure high first-pass yield and seamless site transfers.
• Generates and maintains comprehensive TED packages.
• Contributes to the development of modular code libraries and hardware design standards to improve team-wide efficiency.
• Acts as a technical contributor for development projects, particularly those requiring the modification of existing test capabilities for new products.
• Leads revisions of C/C++ or ETS code and ensures all releases follow formal version control and peer-review protocols.
• Defines the hardware strategy for reliability stress testing (HTOL, HAST, etc.) and ensures accurate data correlation post-stress.
• Provides proactive leadership in Core Team meetings, managing action items and maintaining detailed electronic product notebooks.
• Interfaces directly with U.S., European, and Asian counterparts to ensure project alignment with global test methodologies and technology roadmaps.
• Directly drives the team’s Margin Improvemen t targets by executing data-driven TTR, throughput optimization and yield improvement projects, reducing manufacturing cycle time and product cost.

Requirements

• Who You Are A Bachelor’s Degree or equivalent, coupled with 3-5 years of industry experience.
• A minimum of 5 years of experience in the semiconductor industry.
• Strong knowledge of Project Management, Planning, Test, Development, Probe Test, Final Test, and Qualification and Reliability processes Why Allegro?