SSTC_AI Chip and Middleware Engineer Intern (A000)

• This internship is in ITRI's Service Systems Technology Center(SSTC).
• We are looking for talents to join us in AI chip system design and instruction set extensions for applications such as Artificial Intelligence and High‑Performance Computing (HPC).
• Candidates with any of the following expertise are welcome:

Responsibilities

• AI accelerator hardware architecture performance analysis and system‑level modeling/simulation
• RISC‑V computing architecture, instruction set extensions, and development of simulation platforms (e.g., QEMU)
• FPGA platform development, integration, and verification (including test data flow validation)

Requirements

• Relevant majors include Computer Science, Electrical and Electronic Engineering, or related disciplines.
• Language proficiency: Intermediate English proficiency (listening/speaking/reading/writing).
• Computer organization and microarchitecture analysis

Preferred

• Proficiency in at least one programming language: C, C++, or Python.
• Candidates with any of the following expertise will receive priority consideration:
• QEMU or Linux kernel development
• Familiarity with the following languages is a plus: Verilog, SystemC, C/C++, Python
• The following hands-on experience is highly preferred:
• Image processing algorithms
• Deep learning model architectures
• FPGA development

Professional Skills / Tools

• Deep learning models and AI inference principles
• Processor / AI accelerator / SoC architecture design