ASIC Engineer
- Caesarea, Israel +1
- Mid Level
- 4+ years
- Bachelor's degree
- Posted
Skills
Required
- functional verification methodologies
Preferred
- MATLAB simulations
- bit-exact modeling environments
- Clock Domain Crossing
- micro-architecture
Meet the Team Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation. We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of what’s possible. Cisco Silicon One™ is transforming the industry with a unified, programmable architecture powering Cisco’s future routing portfolio and shaping the Internet for decades to come.
About Cisco
- At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond.
- We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds.
- These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
- Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions.
- Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless.
- We work as a team, collaborating with empathy to make really big things happen on a global scale.
- Because our solutions are everywhere, our impact is everywhere.
- We are Cisco, and our power starts with you.
Responsibilities
- Review micro-architecture specifications • Implement Verification environment UVM based • Collaborate with Design engineers to resolve bugs and achieve coverage closure • Work with the firmware/Lab teams to verify chip flows • Perform debug, root-cause analysis, and post-silicon validation in the lab
Requirements
- B.Sc./M.Sc. in Electrical Engineering from a top university • 4+ years of experience in the filed • knowledge with UVM and functional verification methodologies
Preferred
- Qualifications • Experience with MATLAB simulations and bit-exact modeling environments • Familiarity with mixed-signal systems and environments • Knowledge and hands-on experience with Clock Domain Crossing (CDC) Why Cisco?
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