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Lead EDA Software Engineer (C++, Characterization)

Cadence

Skills

Required

  • EDA
  • C++
  • transistor-level timing
  • aging
  • EMIR analysis
  • Hardcore C++
  • Linux environment
  • data structures
  • algorithms
  • software engineering
  • Unix or Linux platforms
  • quality and software processes

Preferred

  • circuit simulation / library characterization programs
  • SPICE
  • simulation transistor models
  • distributed programming
  • database design
  • cloud APIs
  • distributed computing
  • IoT
  • AI

About Cadence

  • At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
  • At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
  • Today If you are ready to make a difference and push the boundaries of EDA technology, we encourage you to apply and join Cadence’s world-class R&D team.
  • Help us solve what others can’t.

Responsibilities

  • Join our expert R&D team as we create technologies and products that enable static and dynamic transistor-level analysis of the most advanced custom digital and mixed-signal circuits, powering the communication, IoT, and AI markets.
  • Enhance and expand existing tools' architecture to cover timing analysis.
  • Create new frameworks for analyzing effects dominant at n5 and below.
  • Leverage machine learning technology to achieve significant improvements in speed, capacity, and usability over existing solutions.

Requirements

  • Qualifications 5+ years of experience in development of EDA tools and expertise in one or more areas: transistor-level timing, power, noise, aging, reliability, and EMIR analysis.
  • Hardcore C++ knowledge, particularly in a Linux environment.
  • Strong proficiency in designing data structures, algorithms, and applying software engineering principles.
  • Industry experience developing and maintaining C++ based applications on Unix or Linux platforms.
  • Experience with quality and software processes.
  • Proficiency in designing data structures, algorithms, and software engineering principles.
  • Ability to analyze transistor or gate-level schematics.
  • BS degree in Computer Science, Electrical Engineering, or Computer Engineering preferred.

Preferred

  • Experience in development of circuit simulation or library characterization programs.
  • Understanding of SPICE simulation transistor models at a high level.
  • Experience with distributed programming, database design, and cloud APIs for distributed computing.

Why Cadence?

  • At Cadence, you’ll work alongside industry leaders and innovators who are passionate about advancing technology.
  • Your contributions will directly impact the development of cutting-edge tools and solutions for the communication, IoT, and AI industries.

Pay

  • The annual salary range for California is $119,000 to $221,000.
  • You may also be eligible to receive incentive compensation: bonus, equity, and benefits.
  • Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.
  • Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.

Benefits

  • We foster a collaborative environment where your expertise and ideas will shape the technology of tomorrow.
  • paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
  • We’re doing work that matters.