SoC Verification Senior Lead Engineer
Nxp
- Bangalore
- 12+ years
- Master's degree
- Posted
This job is closed: the employer no longer lists it.
Skills
Required
- SoC/IP verification
- SoCs
- ARM-based
- microcontrollers
- SoC-level verification
- Verilog
- SystemVerilog
- constrained-random verification
- EDA tools
- Synopsys
- VCS
- Cadence
Preferred
- SPI
- I²C
- UART
- CAN
- Flash memory
- IPs
We are seeking an experienced Verification Engineer with 12+ years of experience for execution of SoC verification of complex SoCs. The ideal candidate will have deep knowledge of ARM-based microcontrollers, low-power design verification, and experience with multiple interfaces and security IPs. This is a hands-on role requiring strong technical skills and collaboration in a fast-paced environment.
Responsibilities
- Develop and own SoC-level and/or IP-level verification suites with coverage goals.
- Responsible for executing verification plan according to the product specification and verification requirements defined by product architects.
- Responsible for developing, debugging and running UVM based verification environment for RTL/netlist simulation.
- Define and develop test cases in an appropriate verification framework.
- Create stimulus and assertions, run simulation, debug test cases on the design models (RTL, power aware RTL, gate level, FPGA, Emulation platform), run regression, collect and analyze code/functional coverage
- DV closure on diverse IPs and subsystems, ensuring maximum coverage and quality.
- Good understanding of formal verification techniques and methodologies.
- Familiar with both SoC-level and IP-level verification environments.
- Collaborate with the team in developing and improving flows for maximum reuse and efficiency.
- Mentor junior team members while actively collaborating with design teams for issue resolution and sign-off.
Requirements
- Experience: 12-15 years in SoC/IP verification with participation in successful tape-outs of SoCs.
- Strong expertise in ARM-based microcontrollers and SoC-level verification, including C based DV.
- Proficiency in Verilog, SystemVerilog, UVM, and constrained-random verification.
- Familiarity with EDA tools (Synopsys VCS, Cadence Xcelium).
- Experience with low-power verification (UPF) is a must.
- Gate-level simulations and power-aware simulations is a must.
- Good working knowledge of assertions (SVA) and functional coverage.
- Comfortable working in a fast-paced environment.
- Strong team player with excellent communication skills.
- Bachelors or Master’s in Microelectronics, Electronics, Electrical Engineering More information about NXP in India... #LI-29f4
Preferred
- SPI, I²C, UART, CAN, eSPI is desirable.
- Knowledge of Flash memory and security IPs is nice to have.
- Any experience with common Analog IPs in microcontroller design (ADC, DAC, PLLs) is an added advantage.
