Senior Digital Verification Manager

Responsibilities

• Own SoC-level verification strategy, planning, execution, coverage closure and sign-off, while building a strong team and collaborating across architecture, design, software, emulation, validation, quality, safety and security functions.
• Lead, coach and develop SoC verification engineers and technical leads; build team capability through hiring, onboarding, mentoring, succession planning and individual development plans.
• Own verification strategy and plans from product definition through tape-out, including scope, environments, methodology, milestones, metrics, risk management and sign-off criteria.
• Deploy scalable, reusable methods using SystemVerilog/UVM, C/C++, assertions, formal verification, emulation and hardware-software co-verification.
• Review plans, environments, coverage models, regressions, defects, waivers and sign-off evidence; make data-informed decisions and provide clear status and escalation.
• Deliver predictable verification milestones while improving reuse, automation, regression efficiency, debug productivity and AI-assisted verification where it adds measurable value.
• Partner effectively with architecture, IP and SoC design, DFT, firmware, software, validation, quality, functional safety, security and program management teams.

Requirements

• Demonstrated ability to define technical strategy, drive execution, manage risks, and make data-driven decisions across multiple concurrent projects.
• Excellent communication and stakeholder management skills, with the ability to influence and align cross-functional and geographically distributed teams.

Role

Summary Lead an SoC verification team developing advanced MPU and MCU products.

Requirements

Proven experience building, leading, and scaling high-performing SoC verification teams, including hiring, coaching, performance management, succession planning, and organizational capability development. 15+ years of semiconductor verification experience with a strong track record of delivering complex SoC products from architecture definition through tape-out. 5+ years of engineering management experience leading verification teams and technical leaders in a fast-paced product development environment. Deep expertise in SystemVerilog, UVM, coverage-driven verification, assertions, debug, regression management, and verification sign-off methodologies. Strong understanding of SoC architectures, including processors, interconnects, memory subsystems, peripherals, power management, safety, and security features.

Experience in automotive, industrial, or safety-critical semiconductor products is a strong plus, including familiarity with functional safety standards such as ISO 26262. BS/MS in Electrical Engineering, Computer Engineering, Computer Science, Semiconductor or a related technical field. More information about NXP in Greater China... #LI-d6f4